MeitY Approves 23 Chip Design Projects Under DLI Scheme
Why focus: Design Linked Incentive scheme milestones — GS3 Economy/S&T, tests specific Atmanirbhar Bharat electronics manufacturing targets and DLI rules.
In News
What Happened
Why It Matters
Background
History & Context
What Changed
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Product Design Linked Incentive (P-DLI): The scheme officially reimburses up to 50 percent of eligible design expenditure, providing a crucial financial buffer capped at Rs 15 crore per application for companies in the R&D phase.
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Deployment Linked Incentive: To ensure commercial viability, the scheme rewards successful market deployment with 4 percent to 6 percent of net sales turnover over five years, capped at Rs 30 crore per applicant.
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ChipIN Centre Infrastructure: Startups now get subsidized access to a centralized national EDA tool grid, IP core repositories, and Multi-Project Wafer (MPW) fabrication, directly managed by C-DAC.
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Strict Domestic Ownership Mandate: To prevent IP flight, approved applicants must retain their domestic status (more than 50 percent capital owned by resident Indian citizens) for at least three years after claiming incentives.
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Expanded Scope of Components: Approvals now explicitly cover integrated circuits (ICs), chipsets, System on Chips (SoCs), and IP cores critical for emerging sectors like smart energy meters and 5G/6G networking.
What Did NOT Change
The DLI scheme remains strictly confined to the software design, IP creation, and prototyping stages of semiconductors. It does not provide funding for the physical mass-manufacturing of chips, which continues to be handled by the separate Production Linked Incentive (PLI) scheme for Semiconductor Fabs.
Prelims Angle
NCERT Connection
Common Misconceptions
✗ The DLI scheme covers the physical manufacturing and mass fabrication of semiconductor chips.
✓ DLI financially supports the software design, IP creation, and prototyping of chips (the 'fabless' ecosystem). Mass physical fabrication is covered under the PLI scheme.
The umbrella term 'Semicon India Programme' is often used interchangeably in media reports for both design (DLI) and manufacturing (PLI) incentives.
✗ The India Semiconductor Mission (ISM) directly handles the disbursement of funds and EDA tools for chip designers.
✓ While ISM oversees the broader semiconductor strategy, the Centre for Development of Advanced Computing (C-DAC) is the designated nodal agency implementing the DLI scheme and running the ChipIN centre.
ISM is the highly publicized face of India's semiconductor push, leading many to overlook C-DAC's critical operational role in the design infrastructure.
Practice Questions
Q1
How Many CorrectConsider the following statements regarding the Design Linked Incentive (DLI) Scheme under the Semicon India Programme: 1. The Product Design Linked Incentive reimburses up to 50 percent of eligible expenditure subject to a ceiling of Rs 15 crore per application. 2. The Centre for Development of Advanced Computing (C-DAC) serves as the nodal agency for implementing the DLI scheme. 3. Foreign-owned tech giants can avail DLI benefits provided they set up a physical office in India and hire Indian engineers.
Q2
Match the FollowingMatch List I (Component/Entity of Semicon India) with List II (Specific Feature/Role): List I: A. Product Design Linked Incentive B. Deployment Linked Incentive C. ChipIN Centre D. Semicon India Programme List II: 1. Total budget outlay of Rs 76,000 Crore 2. Centralized facility providing EDA tools and IP libraries 3. Reimburses 4 to 6 percent of net sales turnover over five years 4. Reimburses 50 percent of eligible design expenditure
Q3
Assertion & ReasonAssertion (A): Fabless semiconductor companies occupy a highly strategic position in the global chip value chain despite not owning physical manufacturing foundries. Reason (R): Semiconductor design and intellectual property (IP) creation account for up to 50 percent of a chip's total value addition.